Are set inside a CPU interrupt trigger, as well as the external interrupt source interface, the general interrupt mask set up a common decision triggers an interrupt program is executed. And when the instruction is not allowed, there are simultaneously shared data area, it is not allowed (nested int

There is an interruption in CPU triggers the external interrupt sources, there is a general set up the interface, interrupted shielding triggers an interrupt common decision whether the procedure is executed. But the instruction is executed, it cannot be allowed to operate simultaneously also shared

In CPU all establishes an interrupt flip-flop, but also has in exterior interrupt source connection, sets up the interrupt shield trigger to decide together generally whether an interrupt routine is carried out.Moreover when instruction execution cannot permit, but also has the concurrent operation

CPU is set within an interrupt trigger, there are interfaces to external interrupt sources, generally set up interrupt mask triggers, determine whether or not an interrupt routine is executed. And at the time of order execution is not allowed, as well as manipulating shared data areas at the same ti

CPU is set within an interrupt trigger, there are interfaces to external interrupt sources, generally set up interrupt mask triggers, determine whether or not an interrupt routine is executed. And at the time of order execution is not allowed, as well as manipulating shared data areas at the same ti